Output stages or power switches are often operated in a clocked manner to turn on and off the loads connected thereto or to transfer energy thereto. During the clocking, switching edges arise, i.e., transitions from a turned-off state of the switch into a turned-on state. A compromise is to be found in the design of the switching edges between the power loss arising during the switching or during the edges, respectively, in the switch and the interfering emission due to the repeated switching procedures. Thus, edges having a greater slope du/dt (time derivative of the voltage) and therefore a shorter duration have lower losses, while edges having a lesser slope du/dt and therefore a longer duration mean fewer high-frequency (HF) emissions.
For many applications, it is therefore advantageous to keep the variance of the switching edges low, for example, as a result of technological tolerances, temperature, or supply voltage.